Industry Panel: The Importance of Electronics Packaging and Systems Integration for Success of 5G

Date: Monday September 30
Time: 16:30 – 18:30
Room: Conference Room 5


Mike Kelly, Amkor Technology, Inc.

Mike joined Amkor in 2005 and has led package developments for EMI shielding, thermally enhanced packages, sensors and high density MCM packages including 2.5D TSV and high-density fan-out (HDFO). He has worked in electronics and IC package design and manufacturing for 25 years, managing projects ranging from polyester flexible circuits to eutectic flip chip, IC package design and signal integrity. Mike has more than 40 patents in the field and holds master’s degrees in Mechanical and Chemical Engineering.

Title: : 2.5D TSV: A Path to Heterogenous Integration

Abstract: 2.5D Thru-Silicon Vias (TSV) packaging is an enabling technology for broad classes of recent high-performance packages, including high performance graphics, data center network switches, servers, and more recently Artificial Intelligence (AI) accelerators. Beneath this trend is an insatiable thirst for memory bandwidth, made possible by wide, parallel data busses between stacked -DRAM, High Band Width (HBM) memory and close-proximity processors or ASICs. The development of the silicon interposer with novel high aspect ratio TSVs is an ideal platform for integrating different high pin count IC devices. Since the interposer is fabricated using a foundry back-end copper process with dual damascene construction, very fine line signal routing and high signal routing density is made possible. This construction has several key advantages, one of the most important and practical the interposer fabrication in bulk silicon, resulting in a (Coefficient of Expansion) CTE mismatch between the silicon interposer and functional die is very small, resulting in low stress in the die and the bumps. As die have increased in size, this CTE similarity has become more beneficial. Assembly of a 2.5D package required building a module using TSV-bearing interposers, and top die, and assembling the module to a package substrate, very similar to the FCBGA assembly process. As with any truly new technology, there have been key learnings required to derive a process that capable, repeatable, and high yielding. This began with the humble TSV and has culminated in a new class of high-performance IC Packaging. Currently, this package type is in high volume manufacturing.

Saquib Bin Halim, Globalfoundries

Saquib Bin Halim is a Principal Engineer for Advanced Packaging Development at Globalfoundries Dresden. In this role he is responsible for mmW electrical validation of packages and strategy and roadmap of the Assembly Design Kit. He joined Globalfoundries advanced packaging development department in 2017 and worked in the past on RF and mmW signal and power integrity validation methodology development for system and package development. Mr. Bin Halim is active in the RF and mmW signal and power integrity field for more than 8 years now and held a variety of engineering position in Infineon Technologies AG and Globalfoundries. Mr. Bin Halim studied Communications Technology – RF and Microelectronics at University of Ulm in Germany.

Title: Integrated RF/MMW chip to package Co-Design for 5G Technologies

Christian Tschoban,  Fraunhofer IZM Berlin

Christian Tschoban was born in 1985. He received the M.Sc. (Dipl.-Ing.) degree in electrical engineering from the Dresden University of Technology, Dresden, Germany, in 2010. He is currently pursuing the Ph.D. degree in signal/power integrity with the Technical of University Berlin, Berlin, Germany. Since 2010, he has been a Research Engineer with the RF and High-Speed System Design Group, Fraunhofer Institute for Reliability and Microintegration, Berlin, where he has been a Group Leader since 2015.

Title:  5G-Hardware Concepts for 28GHz/38GHz Modules based on Embedding Technologies

Abstract: New Silicon technology is targeted to serve ultra low power, digital data processing and analog IP integration and allows system architects to design IP into one single SoCs. To package these mixed signals SoC, our industry is facing complex challenges by a high number of digital I/O, localized currents with hot spots, and highly sophisticated power and ground networks. The packaging integration of millimeter Wave, in combination with high frequency antennas needs new levels of co-design to go along with advance material and design characterization.

Ian Dennison, Cadence

Ian Dennison is a Cadence Design Systems Senior Group Director, Custom IC and PCB Group. Ian’s experience spans 35 years within the Electronic Design Automation industry with expertise across multiple design disciplines and fabrics. Managing the Cadence R&D office in Edinburgh, Scotland, Ian has focus on future flows, and emerging markets.


Title: 5G Intelligent System Design

Abstract: 5G is new bandwidth and new subsystems, demanding new technologies and new levels of integration. This talk will examine the design challenges, technologies, and integration opportunities across the 5G ecosystem.